Page 57 - ARM 64 Bit Assembly Language

GNU assembly syntax 41

Listing 2.4 A listing with mis-aligned data.

ARM GAS variable1.S page 1
line addr value code
1 .data
2 0000 00000000 i: .word 0
3 0004 01000000 j: .word 1
4 0008 48656C6C fmt: .asciz "Hello\n"
4 6F0A00
5 000f 414200 ch: .byte ’A’,’B’,0
6 0012 00000000 ary: .word 0,1,2,3,4
6 01000000
6 02000000
6 03000000
6 04000000

2.3.3 Filling and aligning

On the AArch64 CPU, data can be moved to and from memory one byte at a time, two bytes
at a time (half-word), four bytes at a time (word), or eight bytes at a time (double-word).
Moving a word between the CPU and memory takes significantly more time if the address of
the word is not aligned on a four-byte boundary (one where the least significant two bits of the
address are zero). Similarly, moving a half-word between the CPU and memory takes signif-
icantly more time if the address of the half-word is not aligned on a two-byte boundary (one
where the least significant bit of the address is zero), and moving a double-word takes more
time if it is not aligned on an eight-byte boundary (one where the least significant three bits
of the address are zero). Therefore, when declaring storage, it is important that double-words,
words, and half-words are stored on appropriate boundaries. The following directives allow
the programmer to insert as much space as necessary to align the next item on any boundary
desired.

.align abs-expr, abs-expr, abs-expr
Pad the location counter (in the current subsection) to a particular storage boundary. For
the AArch64 processor, the first expression specifies the number of low-order zero bits
the location counter must have after advancement. The second expression gives the fill
value to be stored in the padding bytes. It (and the comma) may be omitted. If it is omit-
ted, then the fill value is assumed to be zero. The third expression is also optional. If it
is present, it is the maximum number of bytes that should be skipped by this alignment
directive.