Page 64 - Applied Photovoltaics

1 d FF 1 ª 1 dV oc 1 º 1
| « » | . 0 0015 q C (3.14)
FF dT 6 V dT T
¬ oc ¼
For silicon, the effect of temperature on the maximum power output (P mp ) is as
follows:
1 dP mp
| . 0 ~ . 0 005 q C 1 (3.15)
004
P dT
mp
The higher the value of V oc , the smaller the expected temperature dependence.
Temperature effects are discussed in detail by Emery et al. (1996), King et al. (1997)
and Radziemska (2003).

3.4 EFFECT OF PARASITIC RESISTANCES

Solar cells generally have a parasitic series and shunt resistance associated with them,
as shown in Fig. 3.10. Both types of parasitic resistance act to reduce the fill-factor.

I
R s

I L

V
R sh

Figure 3.10. Parasitic series and shunt resistances in a solar cell circuit.

The major contributors to the series resistance (R s ) are the bulk resistance of the
semiconductor material, the metallic contacts and interconnections, carrier transport
through the top diffused layer, and contact resistance between the metallic contacts
and the semiconductor. The effect of series resistance is shown in Fig. 3.11.

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