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royalty for every unit you build. Some have a flat royalty; some charge a little for
every module you include. I worked on a system once where one engineer wanted
to embed an RTOS in four of the processors. We’d have spent around $800 per
system just in RTOS license fees. Make sure you choose a processor for which a suit-
able RTOS is available and that the RTOS costs are compatible with your product
cost.
Processing Speed Required
This is another area that is easier to get right after you have some experience with
it, but a few guidelines can help:
Add up the interrupt latencies. The processor must be fast enough that a worst-
case stackup of interrupts (it will happen) can be handled without anything bad
occurring. We’ll return to this in the chapter on interrupts.
The length of the polling loop (more about this in a later chapter) must be short
enough to never miss a byte of serial data or a byte from any other interface. In
an interrupt-driven system, the same considerations apply to the length of any
polling loop plus the worst-case interrupt latencies.
Note that in some cases, going to higher speeds gains nothing if wait states must
be inserted to meet the memory access time requirements. We’ll look at wait
states in Chapter 2.
Common pitfalls about processor speed are as follows:
Confusing clock rate with processor speed. A standard 8031, for example, can
accommodate an input clock of 12MHz. So it’s a 12MHz processor, right?
Wrong. The clock circuitry divides the clock by 12 because the internal logic
needs several phases, or clock edges, per instruction. This yields a processor
rate of 1 MHz. Many processors, such as the 80186/80188, divide the external
clock by 2. The PIGfamily processors divide the clock by 4, whereas the Atmel
ATSOS series parts do not. So, at least in raw execution speed, an 8MHz
ATSOS part (8MHz clock, 8MHz execution rate) is faster than a 20MHz PIC
part (20MHz clock, 5MHz execution rate). None of these characteristics is
bad unless you do not know them or do not take them into account.
Not evaluating the instruction set. The Atmel ATSOS and Microchip PIC
16C/17C series parts have a fairly high execution speed. However, the reduced
instruction set computer (RISC) architecture can be a real trap. For example,
these parts lack sophisticated indirect (lookup table) branch capability. An
indirect branch function can be constructed, but that takes some instructions.
Similarly, the parts only have one branch instruction (GOTO). Conditional
branches require two or more instructions to construct. Consequently, the
potential execution rate is reduced by the extra code involved in manipulating
System Design 11