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CHAPTER 1 / INTRODUCTORY REMARKS AND GLOSSARY
Activation level: the logic state of a signal designated to be active or inactive.
Activation level indicator: a symbol, (H) or (L), that is attached to a signal name to
indicate positive logic or negative logic, respectively.
Active: a descriptor that denotes an action condition and that implies logic 1.
Active device: any device that provides current (or voltage) gain.
Active high (H): indicates a positive logic source or signal.
Active low (L): indicates a negative logic source.
Active state: the logic 1 state of a logic device.
Active transition point: the point in a voltage waveform where a digital device passes
from the inactive state to the active state.
Addend: an operand to which the augend is added.
Adder: a digital device that adds two binary operands to give a sum and a carry.
Adder/sub tractor: a combinational logic device that can perform either addition or sub-
traction.
Adjacent cell: a K-map cell whose coordinates differ from that of another cell by only
one bit.
Adjacent pattern: an XOR pattern involving an uncomplemented function in one cell of
a K-map and the same function complemented in an adjacent cell.
ALFSR: autonomous linear feedback shift register.
ALFSR counter: a counter, consisting of an ALFSR, that can sequence through a unique
set of pseudo-random states that can be used for test vectors.
Algorithm: any special step-by-step procedure for accomplishing a task or solving a
problem.
Alternative race path: one of two or more transit paths an FSM can take during a race
condition.
ALU: arithmetic and logic unit.
Amplify: the ability of an active device to provide current or voltage gain.
Analog: refers to continuous signals such as voltages and current, in contrast to digital
or discrete signals.
AND: an operator requiring that all inputs to an AND logic circuit symbol be active before
the output of that symbol is active — also, Boolean product or intersection.
AND function: the function that derives from the definition of AND.
AND gate: a physical device that performs the electrical equivalent of the AND function.
AND laws: a set of Boolean identities based on the AND function.
AND-OR-Invert (AOI) gate: a physical device, usually consisting of two AND gates
and one NOR gate, that performs the electrical equivalent of SOP with an active low
output.
AND plane: the ANDing stage or matrix of a PLD such as a ROM, PLA, or PAL.
Antiphase: as used in clock-driven machines to mean complemented triggering of a
device relative to a reference system, such as, an FET input device to an RET FSM.
Apolar input: an input, such as CK, that requires no activation level indicator to be
associated with it.
Arbiter module: a device that is designed to control access to a protected system by
arbitration of contending signals.
Arithmetic and logic unit (ALU): a physical device that performs either arithmetic or
logic operations.