Page 304 - Hardware Implementation of Finite-Field Arithmetic

284 Cha pte r Ni ne

for j in 0 .. i loop
c(m-1-i) := m2xor(c(m-1-i),m2and(ctr(i-j),f(m-j)));
end loop;
end loop;
An executable Ada file triangular_mult.adb, including Algorithm
9.8, is available at www.arithmetic-circuits.org.

9.3 References
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[FBT96a] S. T. J. Fenn, M. Benaissa, and D. Taylor. “GF(2 ) Multiplication and
n
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[Has95] M. A. Hasan. “Shift Register Synthesis for Multiplicative Inversion over
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[HB95] M. A. Hasan and V. K. Bhargava. “Architecture for a low complexity rate-
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[HTDR88] I. S. Hsu, T. K. Truong, L. J. Deutsch, and I. S. Reed. “A Comparison
of VLSI Architecture of Finite Field Multipliers Using Dual, Normal, or
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[HW00] M. A. Hasan and A. G. Wassal. “VLSI Algorithms, Architectures, and
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[IST06] J. L. Imaña, J. M. Sánchez, and F. Tirado. “Bit-Parallel Finite Field Multipliers
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[KL99] B. S. Kaliski and M. Liskov. “Efficient Finite Field Basis Conversion Involving
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[LN83] R. Lidl and H. Niederreiter. Finite Fields. Addison-Wesley, Reading, MA,
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[MKW89] M. Morii, M. Kasahara, and D. L. Whiting. “Efficient Bit-Serial
Multiplication and the Discrete-Time Wiener-Hopft Equation over Finite