Page 407 - Introduction to Microcontrollers Architecture, Programming, and Interfacing of The Motorola 68HC12

384 Appendix 1 Number Representations and Binary Arithmetic

representation (e.g., 1 for minus, 0 for plus). Additionally, the number zero, which is
now considered positive, is represented by the single sequence 0000. However, the nicest
feature is that the two's-complement representation of M + N is obtained by simply
adding the two's-complement representations of M and N and truncating to four bits. This
works, of course, as long as there is no signed overflow, that is, adding two m-bit
two's-complement numbers whose sum cannot be represented with an m-bit two's-
complement number. For addition, notice that signed overflow occurs when, and only
when, the sign of the two representations added are the same but different from the sign
of the result. A similar observation can be made for the two's-complement representation
ofM-N.
We can now summarize the facts for m-bit two's-complement representations. With
m 1 m 1
m fixed and -2 ~~ s: N < 2 ~~ , the m-bit two's-complement representation of N is
given by:

m 1
1. The m-bit representation of N for 0 «s N < 2 ~ .
m m 1
2. The m-bit representation of 2 + N for -2 ^ * N < 0.
The first bit of the representation is a sign bit and, after a little thought, you should be
able to see that if cm , cO is the rn-bit two's-complement representation of N, then

The difference between equations (2) and (1), of course, is that the first term in (2) is
negative. Finally, the two's-complement representation of M + N is obtained by adding
the two's-complement representations of M and N and truncating to m bits. The answer is
correct except when signed overflow occurs or, equivalently, when the signs of the two
representations are the same but different from that of the result.
If N is positive, its m-bit two's-complement representation y is just its ordinary in-
bit representation. It is not difficult to see that the m-bit two's-complement
representation of -N can be obtained by subtracting each bit of y from 1 and then adding
1 to the result. This procedure, sometimes called "taking the two's-complement" of y,
works even if N is zero or negative, with two exceptions. If N is zero, the result needs to
m 1
be truncated to m bits. If N = -2 ~ , one will just get back the two's-complement
m 1 In 1
representation of -2 . To see why this works for -2 ~ < N < 2 ~ , suppose that y =
c m, CQ and let dj = 1-c j, 0 <* j s m—1. Then it is easy to see from (2) that d m_i .. . do is
the m-bit two's-complement representation of -N-l. That the procedure works now
follows from the fact above for the addition of two's-complement representations.
One situation frequently encountered when two's-complement representations are
used with microprocessors is that of finding the hexadecimal equivalent of the 8-bit
two's-complement representation of a negative number. For example, for a -46 you
could find the 8-bit representation of 46, use the technique just mentioned, and then find
its hexadecimal equivalent. You could also use the two's-complement definition, finding
the 8-bit representation of 24-46 and then converting this to hexadecimal. It would,
however, usually be quicker just to convert 2r-46 = 210 to hexadecimal. Finally, one
could also use a 16's-complement approach, that is, convert the number to hexadecimal,
subtract each hexadecimal digit from 15, and then add 1 to get the result. For example.