Page 63 - A Practical Guide from Design Planning to Manufacturing

Computer Components 39

to wires for data, each bus standard may include additional wires to
carry control signals, power supply, or to act as shields from electrical
noise. Allowing physically long wires makes it easier to connect periph-
erals, especially ones that might be outside the computer case, but ulti-
mately long wires mean long latency and reduced performance. Some
buses are point-to-point buses connecting exactly two chips. These are
sometimes called ports rather than buses. Other buses are designed to
be multidrop, meaning that more than two chips communicate over the
same set of wires. Allowing multiple chips to share one physical bus
greatly reduces the number of separate buses required by the system,
but greatly complicates the signaling on those buses.
The electrical specifications describe the type of data to be sent over
each wire, the voltage to be used, how signals are to be transmitted over
the wires, as well as protocols for bus arbitration. Some bus standards
are single ended, meaning a single bit of information is read from a
single wire by comparing its voltage to a reference voltage. Any voltage
above the reference is read as a 1, and any voltage below the reference
is read as a 0.
Other buses use differential signaling where a single bit of informa-
tion is read from two wires by comparing their voltages. Whichever of
the two wires has the higher voltage determines whether the bit is read
as a 1 or a 0. Differential buses allow faster switching because they are
less vulnerable to electrical noise. If interference changes the voltage of
a single-ended signal, it may be read as the wrong value. Interference
does not affect differential signals as long as each pair of wires is affected
equally, since all that matters is the difference between the two wires,
not their absolute voltages.
For point-to-point bus standards that only allow transmission of data
in one direction, there is only one chip that will ever drive signals onto
a particular wire. For standards that allow transmission in both direc-
tions or multidrop buses, there are multiple chips that might need to
transmit on the same wire. In these cases, there must be some way of
determining, which is allowed to use the bus next. This protocol is called
bus arbitration.
Arbitration schemes can treat all users of the bus equally or give
some higher priority access than others. Efficient arbitration protocols
are critical to performance since any time spent deciding who will trans-
mit data next is time that no one is transmitting. The problem is greatly
simplified and performance improved by having only one transmitter on
each wire, but this requires a great many more wires to allow all the
needed communication.
All modern computer buses are synchronous buses that use a clock
signal to synchronize the transmission of data over the bus. Chips trans-
mitting or receiving data from the bus use the clock signal to determine