Page 211 - Power Electronics Handbook

202 Phase-controlled rectification and inversion
from the load to the supply. Inductors L1 and L, are line impedances. At
time tal, after a delay a:, thyristors TH1 and TI& are fired and in the
absence of line inductors these thyristors would instantaneously carry the
full-load current whilst TH2 and TH3 would turn off. This, however,
requires the reversal of current flow in any line inductors, which cannot
occur instantaneously, so that for a period p all bridge thyristors will
conduct. The instantaneous supply voltage appears across the line
inductors in such a direction as to help build up the current in TH1 and in
ll&, and to decay it in TH2 and TH3. The overlap period, for any given
load current, is minimum when this voltage is at its peak value, i.e. for a:
close to 90". During overlap the load current free-wheels through the four
thyristors so that load voltage is zero. Another way of expressing the same
thing is to consider the load voltage to be the instantaneous mean of the
overlapping phases, which for a single-phase supply is always zero. With
opposite arms of the bridge conducting the voltage across EF is that of the
input AB, and during overlap this falls to zero.
Comparing the waveforms with and without source reactance, the effect
of this reactance can be considered as being fourfold:

(i) The mean d.c. voltage is reduced for any delay angle. This is so since
a portion of duration p has now been removed from the output
waveform.
(ii) The harmonics of the output load have been changed since its
waveform has been modified. Since overlap does not affect the
output pulse number, the spectrum of frequencies present is not
altered. It can be shown that, for the same mean d.c. load voltage,
the amplitude of the harmonics is lower with overlap in the waveform
than when overlap is not present. This is primarily due to the fact that
with overlap the firing angle must be advanced (a: reduced) to
maintain an unchanged d.c. voltage.
(iii) The input voltage to the converter is no longer sinusoidal (as at EF)
but can be considerably distorted. This is important, since the timing
for control circuits is usually derived from this wave and, unless it is
allowed for, faulty operation could result.
(iv) Overlap reduces the safety angle p, where f3 = 180" - (Y - p. This is not
important for rectifier operation, but it must be borne in mind that p
is also the time that is available to a conducting thyristor for turn-off.
Since p reduces as a: increases, commutation failure could occur at
large delay angles. Figure 9.26 shows the circuit waveforms during
inversion, the delay angle being increased so that TH1 and lX, are
fired at almost the end of the half cycle, at fol. Since the instantaneous
supply voltage is low, the overlap angle p is relatively long. When it is
over at tm thyristors TH2 and TH3 go off, but they are reverse biased
for duration p only and they must turn off during this time. If this
does not occur, then at f1 the devices turn on and provide a full half
cycle of power from the supply to the load. It will be seen later that p
varies with load current, so that the maximum value of a: chosen must
make allowances for this. Circuits operating from severe line
impedance sources, therefore, are often limited in voltage control
range.