Page 329 - Programming Microcontrollers in C
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314    Chapter 6  Large Microcontrollers

                       TOC3=TOC1+pwm_count;
                   }


                   @port void PIT_Isr( void) /* the PIT isr */
                   {
                       been_here++;
                       sec++;
                   }
                              Listing 6-4: Clock Routine Added to PWM
                              If you compare this listing with that shown in Listing 6-3, you will
                          find that there are few structural changes to the program. The code
                          used to initialize the SIM is changed by the addition of the initializa­
                          tion of the periodic timer interrupt. This code is shown below.
                   SIM_MCR.IARB=SIM_IARB;              /* IARBs for each module
                                                              is different */
                   PICR.PIRQL=PIC_PIRQL;               /* put all timers at
                                                              level 6 */
                   PICR.PIV=PIC_PIV;                          /* vector is 0x38,
                                                              address is 0x70 */
                   PITR.PTP=ON;                               /* 512 prescaler */
                   PITR.PITM=PIT_PITM;                 /* divide by 16*4, 1
                                                              tic per second */
                              The interrupt arbitration level field in the SIM module control
                          register is set to 4. Recall that the value here can be anywhere be­
                          tween 1 and 15, with 15 the highest priority. All active internal
                          modules that are to use an interrupt must have a unique IARB value.
                          The IARB value for the GPT was set to 5. Note that the interrupt
                          level for both the GPT and the PIT is set to the level 6. Therefore,
                          both sources of timing have the same interrupt priority; however,
                          since the IARB of the GPT is higher than that of the PIT, in the
                          event of a simultaneous occurrence of the two interrupts, the GPT
                          service routine will be executed before the PIT.
                              The interrupt vector for the PIT is placed at 0x38. Because the
                          address of the vector is twice the value of the vector, the interrupt
                          vector address is 0x70. A pointer to the PIT interrupt service rou­
                          tine will be placed at this address in the vector.c routine. The
                          periodic timer itself is set up by the next two lines of code. This
                          clock is driven by the EXTAL signal. In our case, the frequency of
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