Page 107 - The Art of Designing Embedded Systems
P. 107
94 THE ART OF DESIGNING EMBEDDED SYSTEMS
address space. Sometimes this is simply not an option; an awful lot of us
design upgrades to older systems. We’re stuck with tens of thousands of
lines of “legacy” code that are too expensive to change. The code forces us
to continue using the same CPU. Like taxes, programs always get bigger,
demanding more address space than the processor can handle.
Perhaps the only solution is to add address bits. Build an external
mapper using PLDs or discrete logic. The mapper’s outputs go into high-
order address lines on your RAM and ROM devices. Add code to remap
these lines, swapping sections of program or data in and out as required.
Logics/ to Physics/
Add a mapper, though, and you’ll suddenly be confronted with two
distinct address spaces that complicate software design.
The first is the physical space-the entire universe of memory on
your system. Expand your processor’s 64k limit to 256k by adding two ad-
dress lines, and the physical space is 256k.
Logical addresses are the ones generated by your program, and
thence asserted onto the processor’s bus. Executing a MOV A,(OFFFF) in-
struction tells the processor to read from the very last address in its 64k
logical address space. External banking hardware can translate this to some
other address, but the code itself remains blissfully unaware of such ac-
tions. All it knows is that some data comes from memory in response to the
OFFFF placed on the bus. The program can never generate a logical ad-
dress larger than 64k (for a typical &bit CPU with 16 address lines).
This is very much like the situation faced by 80x86 assembly-
language programmers: 64k segments are essentially logical spaces. You
can’t get to the rest of physical memory without doing something; in this
case reloading a segment register.
Conversely, if there’s no mapper, then the physical and logical spaces
are identical.
Hardware Issues
Consider doubling your address space by taking advantage of proces-
sor cycle types. If the CPU differentiates memory reads from fetches, you
may be able to easily produce separate data and code spaces. The 68000’s
seldom-used function codes are for just this purpose, potentially giving it
distinct 16-Mb code and data spaces.
Writes should clearly go to the data area (you’re not writing self-
modifying code, are you?). Reads are more problematic. It’s easy to dis-

