Page 195 - The Art of Designing Embedded Systems
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182  THE ART OF  DESIGNING EMBEDDED SYSTEMS


                              Delayed  sweep is essential when  working  on any embedded  sys-
                         tem-let’s  look at a couple of cases.
                              Suppose your  microprocessor  crashes immediately  after  RESET.
                         Traditional troubleshooting techniques call for hooking up the logic ana-
                         lyzer and laboriously examining all of the data and address lines. Person-
                         ally, I find this  to be  too much trouble.  Worse yet, it tends to obscure
                         “electrical” problems: the analyzer might translate marginal ones and ze-
                         roes into what look like legal digital levels. Logic analyzers are great for
                         purely digital problems, but any problem at power-up can easily be related
                         to signal levels.
                              Only a scope gives you a view of those crucial signal levels that can
                         cause so much trouble. Trigger channel  1 on the RESET input and probe
                         around with channel 2. Look at READ: every processor starts off with a
                         read cycle to grab the first instruction or startup vector. You may find a
                         puzzling phenomenon: if the reset is provided by a source asynchronous to
                         the processor’s clock (as is the case with an RC circuit, a Vcc clamp, and
                         even with many  watchdog timers), READ will bounce  around with re-
                         spect to RESET. You’ll never get a nice high-resolution view of READ
                         this way.
                              Triggering off READ will not help. You need to catch thefirsr read
                         after reset (to look at the first instruction fetch), not any arbitrary incarna-
                         tion of the signal . . . and no doubt there will be millions of reads between
                         resets.
                              The answer is delayed sweep. Put RESET into the scope’s external
                         trigger input and fiddle the knobs until you get a stable trigger. (I like to put
                         one scope channel on the external trigger while doing this initial setup to
                         make sure the trigger is doing what I expect.) Then connect channel  1 to
                         your processor’s READ output and crank the time base until it appears
                         over toward the right side of the display. Go to delayed (A intensified by
                         B) mode, and rotate the B time base trigger adjustment until the bright part
                         of the trace starts on the leading edge of the bouncing READ signal.
                              At this point time base A starts the sweep going on the asynchronous
                         RESET, and time base B triggers the intensified part of the sweep when the
                         first READ comes along. Flip the Horizontal Mode switch to B (to show
                         only the intensified part of the sweep-that  part after the B trigger), and a
                         jitter-free READ will be on the left part of the screen. Cool, huh?
                              With the now stabilized scope display you can use channel 2 to look
                         at the data lines, ROM chip selects, and other signals during the read cycle.
                         It  becomes  a  simple matter  to  see  if  the  first  instruction  gets  fetched
                         correctly. A lot has to be perfect for this to happen. Very often a power-up
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