Page 301 - The Combined Finite-Discrete Element Method

284 COMPUTATIONAL ASPECTS

Ram shared between processors

P0 P1 P2 Pn

Figure 9.1 Parallel architecture with processors sharing memory.

processors working together. For instance, in Figure 9.1 a shared memory architecture
is shown. Processors communicate through sharing RAM. Software libraries give shared
memory parallel programmers a flexible interface for developing parallel applications for
shared memory platforms, ranging from the desktop to the supercomputer. Using such
libraries, one can either parallelise parts of the program such as CPU demanding loops,
or complete regions of the program.
A typical performance of the shared memory approach is shown in Figure 9.2. It is
evident from the figure that the speed increase is not linear, i.e. it lags behind the increase
in number of processors.
A distributed parallel architecture model is shown in Figure 9.3. Each processor has
a separate RAM space associated with it. The processes executing in parallel have a
separate address space. The processors communicate with each other through message
passing. Communication occurs when a portion of one process’s address space is copied
into another process’s address space.

7
6 5
Speed increase 4 3

1 2
0
1 2 3 4 5 6 7 8
Number of processors
Figure 9.2 Speedup using the shared memory approach. Total number of particles-60 million.

Communication between processors

M1 M2 M3 MN

P1 P2 P3 PN

Figure 9.3 Parallel architecture with separate RAM space associated with each processor.