Page 10 - ARM 64 Bit Assembly Language
P. 10
List of tables
Table 1.1 Values represented by two bits. 7
Table 1.2 The first 21 integers (starting with 0) in various bases. 8
Table 1.3 The ASCII control characters. 20
Table 1.4 The ASCII printable characters. 21
Table 1.5 Binary equivalents for each character in “Hello World”. 22
Table 1.6 Binary, hexadecimal, and decimal equivalents for each character in “Hello
World”. 22
Table 1.7 Interpreting a hexadecimal string as ASCII. 23
Table 1.8 Variations of the ISO 8859 standard. 24
Table 1.9 UTF-8 encoding of the ISO/IEC 10646 code points. 25
Table 3.1 Flag bits NZCV in PSTATE. 59
Table 3.2 AArch64 condition modifiers. 59
Table 3.3 Summary of valid immediate values. 61
Table 3.4 Load/Store memory addressing modes. 62
Table 4.1 Formats for Operand2. 84
Table 4.2 Shift and rotate operations in Operand2. 85
Table 4.3 Extension operations in Operand2. 85
Table 7.1 Performance of bigint_negate implementations on an nVidia Jetson TX-1. 235
Table 8.1 Natural and truncated formats for the powers of x needed by the Taylor series. 268
Table 8.2 Reciprocals for the terms two through nine of the Taylor series. 271
Table 8.3 Formats for the powers of x and the constant reciprocals for the first nine terms
of the Taylor series. 272
Table 8.4 Performance of sine function with various implementations. 281
Table 8.5 Format for IEEE 754 Half-Precision. 285
Table 9.1 Condition code meanings for ARM and FP/NEON. 312
Table 9.2 Performance of sine function with various implementations. 317
Table 10.1 Performance of sine function with various implementations. 397
Table 11.1 Raspberry Pi GPIO register map. 415
Table 11.2 GPIO pin function select bits. 416
Table 11.3 GPPUD control codes. 417
Table 11.4 Raspberry Pi expansion header useful alternate functions. 420
Table 11.5 Raspberry Pi PWM register map. 424
Table 11.6 Raspberry Pi PWM control register bits. 425
Table 11.7 Clock sources available for the clocks provided by the clock manager. 428
Table 11.8 Some registers in the clock manager device. 428
Table 11.9 Bit fields in the clock manager control registers. 429
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