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110 Chapter 4

Name Page Operation
str 65 Store Register
stur 67 Store Register (Unscaled)
sub 86 Subtract
svc 106 Supervisor Call
tbnz 76 Test Bit and Branch if Nonzero
tbz 76 Test Bit and Branch if Zero
tst 98 Test Bits
udiv 97 Unsigned divide
umaddl 93 Unsigned multiply add long
umnegl 93 Unsigned multiply negate long
umsubl 93 Unsigned multiply subtract long
umulh 95 Unsigned multiply high
umull 93 Unsigned multiply long

4.5 Chapter summary

The AArch64 Instruction Set Architecture includes 31 general-purpose registers and four ba-
sic instruction types. This chapter introduced the instructions used for

• moving data from one register to another,
• performing computational operations with two source operands and one destination regis-
ter,
• multiplication and division,
• performing comparisons, and
• performing special operations.
Most of the data processing instructions are three address instructions, because they involve
two source operands and produce one result. For most instructions, the second source operand
can be a register, a rotated or shifted register, or an immediate value. This flexibility results in
a relatively powerful assembly language.

Exercises

4.1. If x0 initially contains 1, what will it contain after the third instruction in the sequence
below?

1 add x0, x0, #1
2 mov x1, x0
3 add x0, x1, x0, lsl #1