Page 214 - ARM 64 Bit Assembly Language

202 Chapter 7

When the algorithm terminates, the quotient register contains the result of the division, and
the modulus (remainder) is in the dividend register. Thus, one algorithm is used to compute
both the quotient and the modulus at the same time. There are variations on this algorithm.
For example, on variation is to shift a single bit left in a register, rather than incrementing a
count. This variation has the same two phases as the previous algorithm, but counts in powers

of two rather than by ones. The following sequence shows what occurs after each iteration of
the first loop in the algorithm.

Dividend: 0 1 0 1 1 1 1 0
Divisor: 0 0 0 0 0 1 1 1
Power: 0 0 0 0 0 0 0 1

Dividend: 0 1 0 1 1 1 1 0
Divisor: 0 0 0 0 1 1 1 0
Power: 0 0 0 0 0 0 1 0

Dividend: 0 1 0 1 1 1 1 0
Divisor: 0 0 0 1 1 1 0 0
Power: 0 0 0 0 0 1 0 0

Dividend: 0 1 0 1 1 1 1 0
Divisor: 0 0 1 1 1 0 0 0
Power: 0 0 0 0 1 0 0 0

Dividend: 0 1 0 1 1 1 1 0
Divisor: 0 1 1 1 0 0 0 0
Power: 0 0 0 1 0 0 0 0

The divisor is greater than the dividend, so the algorithm proceeds to the second phase. In
this phase, if the divisor is less than or equal to the dividend, then the power register is added
to the quotient and the divisor is subtracted from the dividend. Then, the power and Divisor
registers are shifted to the right. The process is repeated until the power register is zero. The
following sequence shows what will be in the registers at the end of each iteration of the sec-
ond loop.