Page 219 - ARM 64 Bit Assembly Language
P. 219
Integer mathematics 207
145 adc x1, x1, xzr
146 eor x19, x19, #1 // Keep track of sign
147 endif7:
148 cmp x3, #0 // If divisorHigh < 0
149 bge endif8
150 mvn x2, x2 // Bitwise NOT
151 mvn x3, x3
152 adds x2, x2, #1 // Add 1 for 2’s complement
153 adc x3, x3, xzr
154 eor x19, x19, #1 // Keep track of sign
155 endif8:
156 bl udiv128
157 // If sign bit is set, then complement the result
158 cmp x19, #0
159 bge endif8
160 mvn x0, x0 // Bitwise NOT
161 mvn x1, x1
162 adds x0, x0, #1 // Add 1 for 2’s complement
163 adc x1, x1, xzr
164 // return
165 ldr x19, [sp, #16]
166 ldp x29, x30, [sp], #32
167 ret
168 .size sdiv128,(. - sdiv128)
7.3.3 Division by a constant
In general, division is slow. AArch64 processors provide a hardware divide instruction which
requires multiple clock cycles to produce a result, depending on the size of the operands.
Some older ARMv7 processors must perform division using software, as previously de-
scribed. In either case, division is by far the slowest of the basic mathematical operations.
However, division by a constant c can be converted to a multiply by the reciprocal of c.Itis
obviously much more efficient to use a multiply instead of a divide wherever possible. Effi-
cient division of a variable by a constant is achieved by applying the following equality:
1
x ÷ c = x × . (7.1)
c
The only difficulty is that we have to do it in binary, using only integers. If we modify the
n
right-hand side by multiplying and dividing by some power of two (2 ), we can rewrite
Eq. (7.1) as follows:
2 n −n
x ÷ c = x × × 2 . (7.2)
c