Page 97 - ARM 64 Bit Assembly Language
P. 97

CHAPTER 4

                     Data processing and other instructions




                     The AArch64 processor provides a rich set of data processing instructions, most of which
                     perform arithmetic or bitwise logical operations. There are also a few special instructions that
                     are used infrequently to perform operations that are not classified as load/store, branch, or
                     data processing.

                     The data processing instructions cannot access data stored in memory. They operate only
                     on CPU registers, and possibly immediate data that is encoded as part of the instruction. In
                     general, data must first be moved from memory into a CPU register before processing can be
                     performed. The most common way to move data from memory into registers and vice versa is
                     by using the load and store instructions, which are covered in Chapter 3. Each data processing
                     instruction performs one basic arithmetic or logical operation. The instructions are grouped in
                     the following categories of operations:
                     •   Arithmetic
                     •   Logical,
                     •   Data Movement,
                     •   Multiplication,
                     •   Division,
                     •   Comparison,
                     •   Conditional, and
                     •   Special.



                     4.1 Operand2

                     Most of the data processing instructions require the programmer to specify two source
                     operands and one destination register. Because three items must be specified for these in-
                     structions, they are known as three address instructions. The use of the word address in this
                     case has nothing to do with memory addresses. The term three address instruction comes
                     from earlier processor architectures that allow arithmetic operations to be performed with data
                     that is stored in memory rather than registers.
                     Referring back to Fig. 3.1, the first source operand specifies a register whose contents
                     will be supplied from the register file on the A Bus and enter the ALU. The second source


                     ARM 64-Bit Assembly Language
                     https://doi.org/10.1016/B978-0-12-819221-4.00011-0  83
                     Copyright © 2020 Elsevier Inc. All rights reserved.
   92   93   94   95   96   97   98   99   100   101   102