Page 99 - ARM 64 Bit Assembly Language

Data processing and other instructions 85

Table 4.2: Shift and rotate operations in Operand2.
<shift_op> Meaning
lsl Logical Shift Left
lsr Logical Shift Right
asr Arithmetic Shift Right
ror Rotate Right (Bitwise Instructions Only)

Table 4.3: Extension operations in Operand2.

<extend_op> Meaning
uxtb Unsigned extend byte
uxth Unsigned extend half-word
uxtw Unsigned extend word
uxtx Unsigned extend double-word
sxtb Sign-extend byte
sxth Sign-extend half-word
sxtw Sign-extend word
sxtx Sign-extend double-word
lsl Logical Shift Left

right. The n least significant bits become the most significant n bits, and all other bits are
shifted right by n.The ror option can only be used with bitwise instructions, such as and,
orr, mvn,or tst. It cannot be used with arithmetic instructions such as add or cmp.All of
these instructions will be covered later in this chapter.

4.1.2 Extend operations

Table 4.3 shows the mnemonics available for the extension operations, referred to as
<extend_op>. There is an extension for each size: double-word, word, half-word, and
byte, which can be signed or unsigned. Unsigned extension is the same as zero extension
fills the higher bits with zeroes. Signed extension copies the sign bit into the higher bits.
Note that two extension operations are always redundant depending on the size of the reg-
ister specified. For example, sxtx and uxtx are redundant for 64-bit registers. However, if
Rm is a 32-bit register (Wm), then sxtw and uxtw are redundant. In each of these cases, the
unsigned extension is always preferred. If the <shift_imm> amount is not zero and the
<extend_op> is redundant, then the lsl mnemonic should be used as the <extend_op>
for clarity. Extension cannot be used with logical instructions, which are able to use the ror
<shift_op>.