Page 103 - ARM 64 Bit Assembly Language

Data processing and other instructions 89

bic Bitwise Bit Clear,
eor Bitwise Exclusive OR,
eon Bitwise Exclusive OR NOT,
orr Bitwise OR,
orn Bitwise OR NOT, and
mvn Bitwise NOT.

All of them involve two source operands and a destination register, except for mvn.

4.2.2.1 Syntax

<op>{s} Rd, Rn, <Operand2>
<op2> Rd, Rn, <Operand2>
mvn Rd, <Operand2>

• <op> is either and or bic.
• <op2> is one of eor, eon, orr, orn, bic,or mvn.
• The optional s specifies whether or not the instruction should affect the nzcv flag bits in
PSTATE.
• Recall from Section 4.1 that <Operand2> may use the ror shift and no sign extension.
• <Operand2> may only be used as an immediate in the following cases: and, ands, orr,
and eor.
• mvn is an alias of orn where Rn is ZR.

4.2.2.2 Operations

Name Effect Description
and Rd ← Rn ∧ Operand2 Bitwise AND.
bic Rd ← Rn ∧¬Operand2 Bit Clear.
eor Rd ← Rn ⊕ Operand2 Bitwise Exclusive OR.
eon Rd ← Rn ⊕¬Operand2 Bitwise Exclusive OR NOT.
orr Rd ← Rn ∨ Operand2 Bitwise OR.
orn Rd ← Rn ∨¬Operand2 Bitwise OR NOT.
mvn Rd ←¬Operand2 One’s complement.