Page 106 - ARM 64 Bit Assembly Language

92 Chapter 4

4.2.4.2 Operations

Name Effect Description
lsl Rd ← Rn Rm Shift Left.
lsr Rd ← Rn Rm Shift Right.
asr Rd ← signExtend(Rn Rm) Shift Right with sign extend.
ror Rd ← Rd[Rn − 1 : 0]: Rotate Right.
Rd[sizeof (Rd) − 1 : Rn]

4.2.4.3 Examples

1 lsl x0, x1, x2 // x0 = x1 << x2
2 asr x3, x3, x0 // x3 = signExtend(x3 >> x0)
3 lsr x4, x5, x5 // x4 = x5 >> x5
4 ror x0, x0, x1 // x0 = x0[x1-1:0]:x0[63:x1]

These instructions are redundant because the same results can be achieved with an add or and
instruction. For example:

1 add x0, xzr, x0, lsl #63 // x0 = x0 << 63
2 orr x0, xzr, x0, ror #47 // x0 = x0[46:0]:x0[63:47]

Although the results are identical, use of the lsl, alr, lsr,and ror mnemonics is strongly
encouraged, because it results in code that is much easier to read, debug, and main-
tain.

4.2.5 Multiply operations with overflow

These four instructions perform multiplication using two 32-bit registers to form a 32-bit re-
sult, or two 64-bit registers to form a 64-bit result:

mul Multiply,
madd Multiply add,
msub Multiply subtract,
mneg Multiply negate.

4.2.5.1 Syntax

<op> Rd, Rn, Rm, Ra
<op2> Rd, Rn, Rm