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6.2 KEY FEATURES OF THE STM32F411RET6 MICROCONTROLLER       73
            knowledge of the clock circuitry is required. In reference to Figs. 6.5 and 6.6, we can identify
            the following prescalers:

              AHB prescaler: this prescaler receives the system clock SYSCLK and provides clock to the
              AHB bus (HCLK). The prescaler can take the values from 1,2 to up to 512.
              APB1 prescaler: this prescaler receives the AHB clock (HCLK) and provides clock to the
              APB1 bus peripherals. The prescaler can take the values 1,2,4,8, and 16.
              APB2 prescaler: this prescaler receives the AHB clock (HCLK) and provides clock to the
              APB2 bus peripherals. The prescaler can take the values 1,2,4,8, and 16.
            6.2.9 General Purpose Input and Output (GPIO)

              The STM32F411RET6 microcontroller has 64 pins and 52 of them can be used as general pur-
            pose input or output (GPIO). The GPIO is arranged into five ports, where ports A, B, and C are
            16-bitswide,portHis3-bitswide,andportDisonly1-bit.Duringandafterreset,mostportsare
            configured in analog input mode. Each port has the following basic features:
            • all GPIO pins have weak internal pull-up and pull-down resistors, which can be activated
              under software control.
            • port input states can be floating, pull-up, pull-down, or analog.
            • port outputs can be configured as push-pull, open-drain or pull-up, pull-down
            • the speed of each port can be set
            • I/O port configurations can be locked under software control
            • port pins can be digital I/O, analog input, or they can have alternative functions, such as
              DAC, SPI, USB, PWM, etc.)
            • each port pin can be used with one of 15 alternate functions (AFs)
            • bit manipulations can be performed on each port pin
              Each GPIO port, subject to its hardware characteristics, can be configured in software in
            several modes:

            • input pull-up
            • input-pull-down
            • analog
            • output open-drain with pull-up or pull-down capability
            • Output push-pull with pull-up or pull-down capability
            • AF push-pull with pull-up or pull-down capability
            • AF open-drain with pull-up or pull-down capability
              Fig. 6.7 shows the structure of a push-pull output port pin. Similarly, an open-drain output
            port pin is shown in Fig. 6.8. Input pull-up and pull-down circuits are shown in Figs. 6.9 and
            6.10, respectively.
              GPIOportpinscanbeprogrammedforAFs.ForAFinputs,theportmustbeconfiguredinthe
            requiredinputmode.Similarly,forAFoutputs,theportmustbeconfiguredinAFoutputmode.
            When a port is configured as AF, the pull-up and pull-down resistors are disabled, the output is
            set to operate in push-pull or in open-drain mode. When an I/O port is configured as AF:
            • the output buffer can be configured in open-drain or push-pull mode
            • the output buffer is driven by the signals coming from the peripheral
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