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60 CHAPTER 2 / COMPUTER EVOLUTION AND PERFORMANCE

2.4. Given the memory contents of the IAS computer shown below,
Address Contents
08A 010FA210FB
08B 010FA0F08D
08C 020FA210FB
show the assembly language code for the program, starting at address 08A. Explain
what this program does.
2.5. In Figure 2.3, indicate the width, in bits, of each data path (e.g., between AC and ALU).
2.6. In the IBM 360 Models 65 and 75, addresses are staggered in two separate main mem-
ory units (e.g., all even-numbered words in one unit and all odd-numbered words in
another).What might be the purpose of this technique?
2.7. With reference to Table 2.4, we see that the relative performance of the IBM 360
Model 75 is 50 times that of the 360 Model 30, yet the instruction cycle time is only 5
times as fast. How do you account for this discrepancy?
2.8. While browsing at Billy Bob’s computer store, you overhear a customer asking Billy
Bob what is the fastest computer in the store that he can buy. Billy Bob replies,“You’re
looking at our Macintoshes.The fastest Mac we have runs at a clock speed of 1.2 giga-
hertz. If you really want the fastest machine, you should buy our 2.4-gigahertz Intel
Pentium IV instead.” Is Billy Bob correct? What would you say to help this customer?
2.9. The ENIAC was a decimal machine, where a register was represented by a ring of 10
vacuum tubes. At any time, only one vacuum tube was in the ON state, representing
one of the 10 digits.Assuming that ENIAC had the capability to have multiple vacuum
tubes in the ON and OFF state simultaneously, why is this representation “wasteful”
and what range of integer values could we represent using the 10 vacuum tubes?
2.10. A benchmark program is run on a 40 MHz processor.The executed program consists of
100,000 instruction executions, with the following instruction mix and clock cycle count:

Instruction Type Instruction Count Cycles per Instruction
Integer arithmetic 45000 1
Data transfer 32000 2
Floating point 15000 2
Control transfer 8000 2

Determine the effective CPI, MIPS rate, and execution time for this program.
2.11. Consider two different machines, with two different instruction sets, both of which
have a clock rate of 200 MHz. The following measurements are recorded on the two
machines running a given set of benchmark programs:
Instruction Count
Instruction Type (millions) Cycles per Instruction
Machine A
Arithmetic and logic 8 1
Load and store 4 3
Branch 2 4
Others 4 3
Machine A
Arithmetic and logic 10 1
Load and store 8 2
Branch 2 4
Others 4 3