Page 193 - Electrical Engineering Dictionary

data bus set of wires or tracks on a printed data path the internal bus via which the
circuit or integrated circuit that carry binary processor ships data, for example, from the
data, normally one byte at a time. functional units to the register file, and vice
versa.
data cache a small, fast memory that
data pipeline a mechanism for feeding a
holds data operands (not instructions) that
stream of data to a processing unit. Data is
may be reused by the processor. Typical data
pipelined so that the unit processing the data
cache sizes currently range from 8 kilobytes
does not have to wait for the individual data
to 8 megabytes. See cache.
elements.
data communications equipment (DCE)
data preprocessing the processing of data
a device (such as a modem) that establishes,
before it is employed in network training.
maintains, and terminates a session on a net-
The usual aim is to reduce the dimensionality
work.
of the data by feature extraction.
data compression theorem Claude Shan- data processing inequality information
non’s theorem, presenting a bound to the op- theoretic inequality, a consequence of which
timally achievable compression in (lossless) is that no amount of signal processing on a
source coding. See also Shannon’s source signalcanincreasetheamountofinformation
coding theorem. obtained from that signal. Formally stated,
for a Markov chain X → Y → Z,
data dependency the normal situation in
I(X; Z) ≤ I(X; Y)
which the data that an instruction uses or pro-
duces depends upon the data used or pro-
TheconditionforequalityisthatI(X; Y|Z) =
duced by other instructions such that the in-
0, i.e., X → Z → Y is a Markov chain.
structionsmustbeexecutedinaspecificorder
to obtain the desired results. data reduction coding system any al-
gorithm or process that reduces the amount
data detection in communications, a of digital information required to represent a
method to extract the transmitted bits from digital signal.
the received signal.
data register a CPU register that may be
used as an accumulator or a buffer register or
data flow architecture a computer ar-
as index registers in some processors. In pro-
chitecture that operates by having source
cessors of the Motorola M68000 family, data
operands trigger the issue and execution of
registers are separate from address registers
each operation, without relying on the tra-
in the CPU.
ditional, sequential von Neumann style of
fetching and issuing instructions.
data segment the portion of a process’
virtual address space allocated to storing and
data fusion analysis of data from mul-
accessing the program data (BSS and heap,
tiple sources — a process for which neural
and may include the stack, depending on the
networks are particularly suited.
definition).
data logger a special-purpose processor data stripe storage methodology where
that gathers and stores information for later data is spread over several disks in a disk
transfer to another machine for further pro- array. This is done in order to increase the
cessing. throughput in disk accesses. However, la-

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2000 by CRC Press LLC