Page 280 - Electrical Engineering Dictionary

burgh.) During his career, Fessenden was the puter instruction set. A particular instruction
holder of over 500 patents — only Edison had is executed by executing the steps of its spe-
more. cific fetch–execute cycle. The fetch part of
the cycle retrieves the instruction to be exe-
FET See field-effect transistor. cuted from memory. The execution part of
the cycle performs the actual task specified
fetch cycle the period of time during by the instruction. Typically, the steps in a
which an instruction is retrieved from mem- fetch–execute cycle are made up of various
ory and sent to the CPU. This is the part of the combinations of only three operations:
fetch–decode–execute cycle for all machine 1. the movement of data between various
instruction. registers in the machine,
2. the addition of the contents of two reg-
fetch on demand See fetch policy. isters or the contents of a register plus a con-
stant with the results stored in a register, and,
fetch on miss See fetch policy. less frequently,
3. shift or rotate operations upon the data
fetch policy policy to determine when a in a register.
block should be moved from one level of a
hierarchicalmemoryintothenextlevelcloser fetching the process of reading instruc-
to the CPU. tions from a stored program for execution.
There are two main types of fetch poli-
cies: “fetch on miss” or “demand fetch pol- FFT See fast Fourier transform.
icy” brings in an object when the object is
not found in the top-level memory and is re- FH-CDMA frequency hopping code divi-
quired; “prefetch” or “anticipatory fetch pol- sion multiple access. See frequency hopping
icy” brings in an object before it is required, and code division multiple access.
using the principle of locality. With a “fetch
on miss” policy, the process requiring the ob- FIB See focused ion beam.
jects must wait frequently when the objects
it requires are not in the top-level memory. fiber Bragg grating a distributed Bragg
A “prefetch” policy may minimize the wait reflector written by ultraviolet light in the
time, but it has the possibility of bringing in core of a photosensitive optical fiber. Multi-
objects that are never going to be used. It ple weak Fresnel reflections coherently add
alsocanreplaceusefulobjectsinthetop-level in phase to produce a strong reflection over a
memory with objects that are not going to be well defined narrow band of wavelengths.
used. See also cache and virtual memory.
The prefetching may bring data directly into fiber cladding the region of an optical
the relevant memory level, or it may bring it fiber having a lower index of refraction than
into an intermediate buffer. the core region, to allow confinement of light
in the core.
fetch-and-add instruction for a multi-
processor, an instruction that reads the con- fiber distributed data interface (FDDI)
tent of a shared memory location and then an American National Standards Institute
adds a constant specified in the instruction, standard for 100 megabits per second fiber-
all in one indivisible operation. Can be used optic local-area networks. Incorporates to-
to handle multiprocessor synchronizations. ken processing and supports circuit-switched
voice and packetized data. For its physical
fetch–execute cycle the sequence of steps medium, it uses fiber optic cable, in a dual
that implement each instruction in a com- counter-rotating ring architecture.

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2000 by CRC Press LLC