Page 319 - Electrical Engineering Dictionary
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If the length is very short (less than 0.05 mi-  gate-to-source capacitance  the capaci-
                              crons for GaAs), then quantum effects play a  tance between the gate and source terminals
                              role in device operation.              of a FET. It is formed primarily by the ca-
                                                                     pacitance of the FET’s physical interconnect
                              gate turn off device  (1) any power semi-  structure (extrinsic fixed capacitance) and by
                              conductor switching device which can turned  the depleted region capacitance (intrinsic ca-
                              off with a signal to its gate.         pacitance), which is a function of voltage and
                                                                     temperature.
                                (2) a thyristor capable of gate-turn-off op-
                              eration.
                                                                     gate-to-source voltage  the potential dif-
                                                                     ference between the FET gate and source
                              gate turnoff thyristor  a thyristor that can
                                                                     terminals, this voltage controls the channel
                              be turned off with a negative gate current
                                                                     from saturation to pinchoff. This voltage is
                              while conducting current in the forward di-
                                                                     normally negative for an n-channel FET, and
                              rection.
                                                                     positive for a p-channel FET. However, ei-
                                                                     ther of these devices can be operated in a
                              gate width  the width in microns of that
                                                                     slightly enhanced mode, allowing low-level
                              portion of a FET channel associated with a
                                                                     excursions of the opposite polarity.
                              single gate, as measured in the direction or-
                              thogonal to channel current flow, that can be
                                                                     gateway   See router.
                              pinched off by application of the proper con-
                              trol bias. A single FET structure may include
                                                                     Gauss’ law  fundamental law of electro-
                              many subcells placed in parallel with each
                                                                     magnetic field that states that the total elec-
                              other, resulting in a much higher gate periph-
                                                                     tric/magnetic flux through a closed surface
                              ery for more power (i.e., 4 individual FETs,
                                                                     is equal to the total electric/magnetic charge
                              each with a gate of 100 microns, may be par-
                                                                     enclosed.
                              alleled together to form a 4 × 100 micron
                              FET with a gate periphery of 400 microns).
                                                                     Gauss’ theorem  See divergence theorem.
                              gate-to-drain breakdown voltage  the
                              breakdown voltage of the reverse biased gate-
                                                                     Gaussian aperture  aperture in which the
                              to-drain junction of an FET. Usually it is  transmission profile is a Gaussian function of
                              specified at a predetermined value of current  radius.
                              per millimeter of gate periphery.
                                                                     Gaussian approximation  an approxima-
                              gate-to-drain capacitance  the capaci-  tionusedinstatisticswherethedistributionof
                              tance between the gate and drain terminals  a sum of random variables is approximated
                              of a FET. It is formed primarily by the ca-  by the Gaussian distribution. Such an ap-
                              pacitance of the FET’s physical interconnect  proximation is based on the central limit the-
                              structure (extrinsic fixed capacitance) and by  orem of probability.
                              the depleted region capacitance (intrinsic ca-
                              pacitance), which is a function of voltage and  Gaussian beam  electromagnetic beam
                              temperature.                           solution of the paraxial wave equation in
                                                                     which the field has spherical phase fronts and
                              gate-to-source breakdown voltage  the  is a Gaussian function of distance from the
                              breakdown voltage of the reverse-biased  beam axis.
                              gate-to-source junction of an FET. Usually it
                              is specified at a predetermined value of cur-  Gaussian distribution  a probability den-
                              rent per millimeter of gate periphery.  sity function characterized by a mean µ and



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