Page 250 - Embedded Microprocessor Systems Real World Design

CPU 1 checks the flags and finds them all 0.
CPU 2 checks the flags and finds them all 0.
CPU 1 writes its flag to 01.
CPU 2 writes its flag to 01.
CPU 1 checks the flags again and finds that CPU 2 has set the flag.
CPU 2 checks the flags, finds that CPU 1 has set the flag, and waits to see what
CPU 1 will do.
CPU 1 sets the flag to 02, indicating that it will wait.
CPU 2, polling the flags, sees CPU 1 indicate that it is waiting.
CPU 2 sets its flag to 03, indicating that it is taking the resource.

In Scenario 2:
CPU 1 checks the flags and finds them all 0.
CPU 2 checks the flags and finds them all 0.
CPU 1 writes its flag to 01.
CPU 1 reads the flags again and finds that its flag is the only one set.
CPU 2 writes its flag to 01.
CPU 1 writes 03 to its flag, indicating that it is taking the resource.
CPU 2 checks the flags again, finds 03 in CPU 2’s flag, and waits.

In Scenario 3:
CPU 1 checks the flags and finds them all 0.
CPU 2 checks the flags and finds them all 0.
CPU 2 writes its flag to 01.
CPU 2 checks the flags and finds its flag is the only one set.
CPU 2 writes 03 to its flag, indicating that it is taking the resource.
CPU 1 writes its flag to 01 (CPU 1 was slow or delayed).
CPU 1 checks the flags, finds that CPU 2 has taken the resource, and waits

In Scenario 4:
CPU 1 checks the flags and finds them all 0.
CPU 2 checks the flags and finds them all 0.
CPU 2 writes its flag to 01.
CPU 2 checks the flags and finds its flag is the only one set.
CPU 1 writes its flag to 01.
CPU 1 checks the flags and finds that both flags are set.

Multiprocessor Systems 231