Page 102 - Introduction to Microcontrollers Architecture, Programming, and Interfacing of The Motorola 68HC12

3.6 Architectural Notions Of Addressing 79

ADD 511,512,516
ADD 513,516,516
ADD 514,516,516
ADD 515,516,516

while the one-address 6812 uses

LDAA 511
ADDA 512
ADDA 513
ADDA 514
ADDA 515
STAA 516

A comparison now shows that the three-address machine takes 28 bytes while the
one-address 6812 takes 18. Of course, this computation is very inefficient for the three-
address machine, but it may represent a more typical computation than the one that the
particular instruction directly handles.
In §12.5, we will see a three-address architecture in the fast and powerful 500 series
of Motorola microcomputers. The three-address architecture is actually the method of
choice for these powerful microcomputers because this architecture actually permits
several instructions to be executed in parallel if the instructions' registers are mutually
distinct. Nevertheless, there are applications in which the three-address architecture is
justifiable based on static or dynamic efficiency.
You may have already run into confusing addressing modes. If you haven't yet, we
would like to offer the following discussion to help you when you do. Consider the
instruction

LDX 0,X

that loads a register using an address that is calculated using the same register. Is this like
a definition of a term that uses the term to define itself? No. It is quite legal and very
useful in handling data structures such as linked lists, which you will study in Chapter
10. Let us review the fetch/execute cycle again, with this particular instruction as an
example. First, the opcode and then the post byte are fetched. The opcode is decoded, and
then the address is calculated. Predecrementing, if needed, is done at this point. Finally,
the operation is carried out. Note that the address is calculated using the old value in the
index register X. Then the two words recalled from that address are put into the index
register to become the new value of the register. For example, if X contained 100,
location 100 contained 0, and location 101 contained 45, then, after the instruction is
executed, the X register contains 45.
There are some further ambiguities with the last load instruction and the
corresponding store instruction when postincrementing is used. For example, with the
instruction
LDX 2,X+