Page 220 - Introduction to Microcontrollers Architecture, Programming, and Interfacing of The Motorola 68HC12
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7,4 Long Integer Arithmetic 197
PSHD ; Move up low 16-bits from register L to stack
PSHY ; Move up high 16-bits from register L to stack
LDY ALPHA ; Get high 16-bits of register L
LDD ALPHA+2 ; Get low 16-bits of register L
This program segment's first two instructions alone will duplicate the top stack element,
PSHD ; Duplicate low 16-bits from register L to stack
PSHY ; Duplicate high 16-bits from register L to stack
Similarly, to maintain the stack mechanism, a long word can be pulled from the stack to
fill L. The following program segment pulls a long word into location ALPHA.
STY ALPHA ; Save high 16-bits of register L
STD ALPHA+2 ; Save low 16-bits of register L
PULY ; Move down high 16-bits to register L
PULD ; Move down low 16-bits to register L
If you use a macro assembler, these operations are easily made into macros. Otherwise,
you can "hand-expand" these "macros" whenever you need these operations.
A 32-bit negate subroutine is shown in Figure 7.14. The algorithm is implemented
by subtracting register L from 0, putting the result in L. This is a monadic operation, an
operation on one operand. You are invited to write subroutines for other simple monadic
operations. Increment and decrement are somewhat similar, and shift left and right are
much simpler than this subroutine. (See the problems at the end of the chapter.)
A multiple-precision comparison is tricky in almost all microcomputers if you want
to correctly set all of the condition code bits so that, in particular, all of the conditional
branch instructions will work after the comparison. The subroutine of Figure 7.15 shows
how this can be done for the 6812. If Z is initially set, using ORCC #4, entry at
CPZRO will test register L for zero while pulling it from the stack. The first part of this
subroutine suggests how subroutines for addition, subtraction, ANDing, ORing, and
exclusive-ORing can be written.
* SUBROUTINE NEG negates the 32-bit number in L.
*
NEG: PSHY ; Save high 16 bits
PSHD ; Save low 16 bits, which are used first
CLRA ; Clear accumulator D
CLRB
SUED 2, SP+ ; Pull low 16 bits, subtract from zero
TFR D, Y ; Save temporarily in Y
LDD #0 ; Clear accumulator D, without changing carry
SBCB 1, SP ; Subtract next-to-most-significant byte
SBCA 2, SP+ ; Subtract most-significant byte, balance stack
XGDY ; Exchange temporarily in Y with high 16-bits
RTS ; Return with result in register L
Figure 7.14.32-Bit Negation Subroutine