Page 376 - Introduction to Microcontrollers Architecture, Programming, and Interfacing of The Motorola 68HC12

12,2 The 6808 353

Figure 12.2. Registers of the 6808

The 6808 addressing modes, except indexed, are the same as those in the 6812. The
16-bit index register HX is used as a pointer register without offset, as an index register
with an unsigned 8-bit offset, and as an index register with a 16-bit offset. The stack
pointer SP is used as a 16-bit register with an unsigned 8-bit or 16-bit offset. The MOV
(byte move) and CBEQ (compare and branch if equal) can use either pointer post-
increment or post-increment with 8-bit unsigned offset.
The instructions dealing with accumulator D in the 6811 and 6812 generally can be
replaced with those dealing with the 8-bit accumulator A in the 6808, at some loss in
efficiency. The index register HX is treated as a pair of registers, register H and register
X, just as accumulator D is accumulator A and accumulator B in the 6812, X can also be
compared, incremented, decremented, shifted, or used in MUL, like an accumulator.
The instruction set of the 6808 and its addressing modes appear in Table 12.2. New
instructions, not in the 6812 or 6811, are discussed below. These include MOV, RSP,
CPX, CPHX, AIX, AIS, NSA, CBEQ, DBNZ, BHCC, BHCS, BIH, and BIL. Also the
BSET, BCLR, BRSET, and BRCLR instructions use a bit position rather than a mask.
The 6808 MOV instruction is like the 6812 MOVE instruction but is restricted to a
source that may be immediate, page-zero, or autoincrement addressed and a destination
that is page-zero addressed or else a page zero source and destination that is autoincrement
addressed. It is especially useful for I/O that are ports on page zero.
RSP, needed for upward compatibility to the 6805, writes $FF into register X but
leaves register H unmodified. However, TXS and TSX move the index register HX to and
from the stack pointer SP (TSX increments and TXS decrements the value moved), so the
stack pointer can be set up in index register HX and transferred into SP. Because SP
points to the first free word below the stack, byte 0,SP shouldn't be read or written.

Figure 123. Bits in the 6808 Condition Code Register