Page 154 - A Practical Guide from Design Planning to Manufacturing

Chapter
5

Microarchitecture

Overview
This chapter discusses the trade-offs in the high-level implementation
of a microprocessor and how they affect performance. The different
measures of processor performance are compared along with methods
for improving performance. Cache operation is described in more detail,
and the life of an instruction in the Pentium 4 pipeline is presented as
a detailed example of modern processor microarchitecture.

Objectives
Upon completion of this chapter, the reader will be able to:
1. Explain how a processor pipeline improves performance.
2. Describe the causes of pipeline breaks.
3. Explain how branch prediction, register renaming, out-of-order execution,
and HyperThreading improve performance.
4. Be aware of the limitations of different measures of processor per-
formance.
5. Understand the impacts of pipeline depth on processor performance.
6. Describe the causes of cache misses and how different cache param-
eters affect them.
7. Explain the need for cache coherency and understand its basic operation.
8. Understand the difference between macroinstructions and micro-
instructions.
9. Be familiar with the pipeline of the Pentium 4 processor.

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