Page 195 - A Practical Guide from Design Planning to Manufacturing

168 Chapter Five

Conclusion

Designing a processor microarchitecture involves trade-offs of IPC, fre-
quency, die area, and design complexity. Microarchitectural design must
balance these choices based on the target market. There are many com-
plicated algorithms that could be implemented in hardware to add per-
formance but are not used because of the design time and die area they
would take to implement. Each square millimeter of die area required
by a microarchitectural feature will either add to the overall cost or
take area away from some other feature. A larger branch target buffer
may mean a smaller trace cache. The design team must find the features
that provide the greatest performance improvement per area for the pro-
grams that are most important for their product. Some of the most
important design choices will include:

Pipeline length
Instruction issue width
Methods to resolve control dependencies
Methods to resolve data dependencies
Memory hierarchy
These and other microarchitectural choices will define most of the
high-level details of the design. The following chapters will focus on the
job of implementing the design.

Key Concepts and Terms
Amdahl’s law Microinstructions
Branch prediction Out-of-order execution
Cache coherency Pipelining
Control dependency RAT
Data dependency Register renaming
HyperThreading ROB
IPC Superscalar
MESI TLB
Microcode Trace cache

Review Questions
1. What are the causes of pipeline breaks?
2. What effect will increasing the pipeline length likely have on fre-
quency, IPC, and performance?