Page 312 - Programming Microcontrollers in C
P. 312
System Integration Module (SIM) 297
paragraphs each contain a brief description of the several blocks found
within the SIM. The set up and control of these blocks are all con
trolled by the registers described in the SIM book on the CD-ROM.
System Configuration and Protection
This module monitors many of the things that can go wrong with
the operation of the MC68HC16. Internal and external signals can
be generated that signal an error has occurred. Reset signals can be
originated from several sources. The reset status monitor keeps track
of the source of the latest reset to help with debug operations. The
halt monitor responds to a HALT signal on the internal bus. This
monitor, if properly enabled, can request a reset. The bus monitor
and the spurious interrupt monitor can each request a bus error. The
bus monitor responds primarily to an unanswered asynchronous bus
transfer request. Such a sequence is usually the result of a program
access to unimplemented memory. If properly enabled, the spurious
interrupt monitor can initiate a bus error.
There are two time-based functions in the system configuration
and protection section of the SIM. The first is a software watchdog
timer. This timer requires that the program access a memory location
with a code sequence. This access resets a timer. With a proper pro
gram, the special location in memory is accessed routinely in the normal
execution of the program and the timer should never overflow. If it
does, there is probably a system error that is corrected by a system
reset. The periodic interrupt timer is used whenever a simple clocking
sequence is needed. We will see use of this timer in a later section.
System Clock
The system clock provides timing signals for the IMB and all of the
internal modules of the microcontroller. The time base for the
microcontroller can be a 32768-kHz reference crystal , a 4.194-MHz
crystal, or an external clock signal. If either of the crystal oscillators are
used there is an internal phase-locked loop frequency multiplier that will
multiply the operating frequency to the final system clock frequency.
External Bus Interface
The external bus interface transfers information between the IMB
and external devices. This interface supports a 16-bit data bus, up to a