Page 410 - Programming Microcontrollers in C

Delay Routine 395

Delay Routine

In the course of this chapter, we are going to see several small
routines and programs that can be used to accomplish some useful
tasks. One routine that is often useful is a delay routine. There are
several ways to implement a delay. A most important feature of any
delay routine is that it must be accurate and it must not depend on
counting a number of instruction cycles to measure the delay. Almost
all microcontrollers have timer subsystems that can be used to control
these delays.
A delay program has to cause an executing program to suspend
execution for a specified time. What is the program to do during this
time? The simplest approach is to have the delay program merely
execute a loop until the time has past, and this is the first approach
that we will use. If your program consumes essentially all of the
computer resources, such an approach is very wasteful. The computer
will merely execute a tight loop during the entire delay and exit the
loop when the delay is completed. The computer is unable to do
anything else during the delay.
There is a second approach that returns control of the computer
to the calling program and allows other operations to execute during
the delay time. This approach uses a semaphore to control execution
of the calling program. We will see this approach shortly.
Listing 8.1 is the code for the function void delay(int
time). This function makes use of the programmable interval timer,
PIT, portion of the on-board timer found on the MMC2001. The
timer is driven by a 32768-Hz crystal oscillator. The frequency
generated by this oscillator is divided by four. Therefore, the time
period of clocks entering the PIT is 1/8192 seconds, or 122.070312
microseconds. This is the resolution of the PIT on this chip. There
are two registers, the PIT data register, ITDR, and the PIT alternate
data register, ITADR. The data written to the ITDR is retained and is
transferred to the ITADR the next time that the ITADR underflows,
indicating completion of the specified time sequence. At that time,
the contents of the ITDR are written to the ITADR, and the PIT
interrupt flag ITIF is set. If the interrupt sequence is enabled, a core
processor interrupt is requested. Otherwise, the system can be polled
to determine when the time has expired. This approach is used in the
following program.