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Firmware Musings  101


                    repeats at a rate that is not related to the rowkolumn configuration of the
                    chips.
                         For 64k of RAM, a string 257 bytes long is perfect: 257 is prime, and
                    its square is greater than the size of the RAM array. Each instance of the
                    string will start on a different low-order address. Also,  257 has another
                    special magic: you can include every byte value (00 to Oxff) in the string
                    without effort. Instead of manually creating a string in your code, build it
                    in real time by incrementing a counter that overflows at 8 bits.
                         Critical to this, and every other RAM test algorithm, is that you write
                    the pattern to all of RAM before doing the read test. Some people like to
                    do nondestructive RAM tests by testing one location at a time, then restor-
                    ing that location’s value, before moving on to the next one. Do this and
                    you’ll be unable to detect even the most trivial addressing problem.
                         This algorithm  writes and reads every RAM  location once, so it’s
                    quite fast. Improve the speed even more by skipping bytes, perhaps writ-
                    ing and reading every 3rd or 5th entry. The test will be a bit less robust, yet
                    will still find most PCB and many RAM failures.
                         Some folks like to run a test that exercises each and every bit in their
                    RAM array. Though I remain skeptical of the need, since most semicon-
                    ductor RAM problems are rather catastrophic, if you do feel compelled to
                    run such a test, consider adding another iteration of the algorithm just de-
                    scribed, with all of the data bits inverted.

                         Noise Issues

                         Large RAM arrays are a constant source of reliability problems. It’s
                    indeed quite difficult to design the perfect RAM system, especially with
                    the minimal margins and high speeds of today’s 16- and 32-bit systems. If
                    your system uses more than a couple of RAM parts, count on spending
                    some time  qualifying its reliability  via the normal  hardware diagnostic
                    procedures. Create software RAM tests that hammer the array mercilessly.
                         Probably one of the most common forms of reliability problems with
                    RAM arrays  is pattern  sensitivity. Now,  this is not  the famous pattern
                    problems of yore, where the chips (particularly DRAMS) were sensitive to
                    the groupings of ones and zeroes. Today the chips are just about perfect in
                    this regard. No, today pattern problems come from poor electrical charac-
                    teristics of the PC board, decoupling problems, electrical noise, and inad-
                    equate drive electronics.
                         PC boards were once nothing more than wiring platforms, slabs of
                    tracks that propagated  signals with near-perfect fidelity. With very high-
                    speed signals, and edge rates (the time it takes a signal to go from a zero to
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