Page 155 - The Art of Designing Embedded Systems
P. 155

142  THE ART OF  DESIGNING EMBEDDED SYSTEMS


                              ICES can be finicky beasts to tame. With a hundred or more con-
                              nections to your target hardware, the smallest bit of dirt, vibration,
                              or bad luck can cause erratic operation that will drive your devel-
                              opers out of their minds. For this reason I always recommend sol-
                              dering the emulator to an SMT part, rather than using a clip-on
                              connection. Find a reliable hook-up scheme early, to avoid infinite
                              frustration later.


                            BDMs

                            CPU cores hidden away inside ASICs give fabulously small systems,
                       yet that buried processor is all but impossible to probe. Couple bus cycles
                       within fractions of a nanosecond to a peripheral and you leave no margin
                       for your  tools.  One-off  CPUs,  whether  from  burying  a  VHDL  virtual
                       processor inside a high-integration part, or from the huge explosion of de-
                       rivatives of popular parts, are often tool orphans. Tool vendors, after all,
                       won’t invest huge sums in developing products for a particular CPU unless
                       they see a large, healthy market for their offerings.
                            Even seemingly boring issues such as device packaging further iso-
                       late us from the processor. If we can’t probe it, we can’t see what’s going
                       on. We lose the visibility needed to find bugs.
                            The  trend  is  to  separate  run  control  from  real-time  trace.  “Run
                       control” means those simple debugging features that we’d expect even in
                       nonembedded  work:  simple  breakpoints,  single-stepping,  and  access
                       to processor  resources,  memory,  and peripherals.  Probably  95% of  all
                       debugging uses nothing more than these relatively simple features. Trace,
                       though, demands real-time access to the entire data, address, and control
                       busses,  and  so is  generally  a rather  thorny  and expensive part  of  any
                       emulator.
                            But the promise of a serial debugger remains seductive, given that
                       just a few wires replace the hundreds of connections used by an emulator
                       or logic analyzer. Motorola recognized this early on and created the Back-
                       ground  Debug  Mode  (BDM),  a  feature first  found  on  the  683xx  and
                       68HC 16 processors, since extended and incorporated on many other chips.
                            BDM is a bit of specialized debugging hardware built right into the
                       chip (Figure 7-2). Transistors are so cheap it makes sense to build a debug
                       interface into even production chips. Clearly this overcomes one major ob-
                       jection of bond-outs: the “stepping level” of the production IC is always
                       identical to the debug part. , . because they are one and the same.
                            BDMs eliminate all speed and packaging issues. As part of the sili-
                       con, the debugger runs as fast as the chip; the interface to the outside world
   150   151   152   153   154   155   156   157   158   159   160