Page 173 - The Art of Designing Embedded Systems

160 THE ART OF DESIGNING EMBEDDED SYSTEMS

ware pushes the envelope of physical possibilities. If you don’t recognize
these realities and deal with them early, your system will be virtually
undebuggable.
Don’t push the timing margins. All emulators eat nanoseconds. With
no margin the tool will just not work reliably. I’ve seen quite a few designs
that consume every bit of the read cycle. Some designers convince them-
selves that this is fine-the timing specs are worst-case scenarios met at
max or min temperatures, leaving a bit of wiggle room for the tool. As
speeds increase, though, IC vendors leave ever less slop in their specifica-
tions. It’s dangerous to rely on a hope and a prayer.
Before designing hardware, talk to the tool vendor to learn how much
margin to assign to the debugger. Typically it makes sense to leave around
5 nsec available in read and write cycle timing. Wait states are another
constant source of emulator issues, so give the tool a break and ease off on
the times by four or five nanoseconds there, as well.
Fact: if you don’t leave sufficient margin, the system will be virtually
undebuggable. Now, BDMs and ROM monitors will generally work in
marginless designs, but you’ll give up the ability to bring up dead hard-
ware and track real-time firmware flow.
Be wary of pull-up resistors. CMOS’s infinite input impedance lures
us into using lots of ohms for the pull-ups. Remember, though, that when
you connect any sort of tool to the system, you’ll change the signal load-
ing. Perhaps the tool uses a pull-down to bias unused inputs to a safe value,
or the signal might go to more than one gate, or to a buffer with wildly dif-
ferent characteristics than used on your design. I prefer to keep pull-ups to
10k or less so the system will run the same with and without an emulator
installed.
If you use pull-down resistors (perhaps to bias an unused node such
as an interrupt input to zero, while allowing automatic test equipment to
properly bias the node in production test), remember that the tool may in-
deed have a weak pull-up associated with that signal. Use too high of a re-
sistance and the tool’s internal pull-up may overcome your pull-down. I
never exceed 220 ohms on pull-downs.
Synchronous memory circuits defeat some emulators. These designs
ignore the processor’s read and write outputs, instead deriving these criti-
cal signals from status outputs and the clock phase. Vadem, for example,
makes chip sets based on NEC’s V30 whose synchronous timing is fa-
mously difficult for ICES.
This sort of timing creates a dilemma for ICE vendors. What sorts of
signals should the emulator drive when the unit is stopped at a breakpoint?
A logical choice is to drive nothing: put read, write, and all other control