Page 250 - The Art of Designing Embedded Systems
P. 250
Index
Access, nonintrusive, 136-37 identify bad code, 30
Addresses stop, look, listen, 28-30
logical, 94
translating, 96 C
ALE (Address Latch Enable), 1 17 formatting, 2 17-1 8
Analysis, post mortem. 194-95 language, 61-64
Analyzers Capital equipment justification. 155
logic, 158 Challenger explosion. 1. 192
performance, 79-82 Chips
ASICs (application-specific integrated bond-out, 140
circuits), 76, 109, 142, 154 FIFO, 60-6 1
Assembly CIMM (Capability Immaturity Model),
formatting, 2 18-1 9 9-10
language, 6 1-64 Clip leads, 171, 177
Assumptions, 172-74 Clock-shaping logic, I17
Audit, weekly, I87 Clocks, 115-17
Author’s role defined, I7 CMM (Capability Maturity Model). 8-33
achieving schedule and cost goals, 10
Bad code, identify, 30 being wary of. 12
Banking, 93-97 five levels of software maturity. 9
hardware issues, 94-96 CMOS (complementary metal-oxide
logical to physical, 94 semiconductors), 1 12. I5 I
software, 96-97 gate, 1 13
RDM (Back-ground Debug Mode) and logic, 1 11
JTAG (Joint Test Access Group) voltage levels, 1 I6
hardware, 1434 COCOMO (Constructive Cost Model)
BDMs (Back-ground Debug Modes), data, 3637
142-45, 162, 184 metric. 41
debugger, 144 model, 37
Bit banging software, UART, 44 Code
BOMs (Bills of Materials). 224, 229-30 break down by features, 47
Bond-out chips, 140 complexity grows much faster than
Book, Master Drawing, 226-27 program size, 82-83
Boss management, 190-92 cost of inspecting, 22
Breakpoints how fast one generates embedded. 32
complex, 138 Inspections, 133
hardware, 40, 138 startup. 207-8
problems, 69-7 1 writing polled, 54-55
Bug measurements, three big reasons for, Code Inspections
27-28 process, 18-22
Bug rates follow-up, 20
measure one’s, 27-30 inspection meeting, 19-20
