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MICROCOMPUTER INSTRUMENTATION AND CONTROL 4

the program counter register; that is, the 16 bits in the program counter are
used as the address for a memory read operation. Each instruction is read from
memory in sequence and set on the data bus into the instruction register, where
it is decoded. The instruction register is another temporary storage register
inside the CPU (or microprocessor). It is connected to the data bus when the
information on the bus is an instruction.

Operation Codes
The actual instructions Numeric codes called operation codes (or op codes for short) contain the
in the program are in the instructions that represent the actual operation to be performed by the CPU.
form of numeric codes The block diagram of Figure 4.7, which illustrates part of the CPU hardware
called operation codes organization, should help clarify the flow of instructions through the CPU.
(op codes). The instruction register has a part that contains the numeric op codes. A
decoder determines from the op codes the operation to be executed, and a data
register controls the flow of data inside the CPU as a result of the op code
instructions.
Instructions often are One important function of the op-code decoder is to determine how
contained in more than many bytes must be read to execute each instruction. Many instructions
one byte. In such cases, require two or three bytes. Figure 4.8 shows the arrangement of the bytes in
the first byte contains an instruction. The first byte contains the op code. The second byte
the op code, and suc- contains address information, usually the low or least significant byte of the
ceeding bytes contain address.
the address.
Program Counter

Each successive read of a The program counter is used by the CPU to address memory locations
memory location causes that contain instructions. Every time an op code is read (this is often called
the program counter to fetched) from memory, the program counter is incremented (advanced by
be incremented to the one) so that it points to (i.e., contains the address of) the next byte
address of the next byte. following the op code. If the operation code requires another byte, the
program counter supplies the address, the second byte is fetched from
memory, and the program counter is incremented. Each time the CPU
performs a fetch operation, the program counter is incremented; thus, the
program counter always points to the next byte in the program. Therefore,
after all bytes required for one complete instruction have been read, the
program counter contains the address for the beginning of the next
instruction to be executed.

Branch Instruction
All of the branch instructions require two bytes. The first byte holds the
operation code, and the second byte holds the location to which the processor
is to branch.

UNDERSTANDING AUTOMOTIVE ELECTRONICS 111