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4 MICROCOMPUTER INSTRUMENTATION AND CONTROL
Figure 4.7
CPU Organization
FPO
A positive branch offset Now, if the address information associated with a branch instruction is
address results in a only 8 bits long and totally contained in the second byte, it cannot be the actual
branch to a higher mem- branch address. In this case, the code contained in the second byte is actually a
ory location, while a two’s complement number that the CPU adds to the lower byte of the program
negative branch offset counter to determine the actual new address. This number in the second byte of
address results in a the branch instruction is called an address offset or just offset. Recall that in two’s
branch to a lower mem- complement notation, the 8-bit number can be either positive or negative;
ory location. therefore, the branch address offset can be positive or negative. A positive
branch offset causes a branch forward to a higher memory location. A negative
branch offset causes a branch to a lower memory location. Since 8 bits are used
112 UNDERSTANDING AUTOMOTIVE ELECTRONICS