Page 137 - Understanding Automotive Electronics

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4 MICROCOMPUTER INSTRUMENTATION AND CONTROL

Shift and AND

During the final part of In our example program, the accumulator is still not ready to perform the
the AND operation, the final AND operation. Remember that SEAT contains the contents of the
shift left logically buffer and the conditions of signal A and signal B. The contents of the
instruction is used to accumulator must be ANDed with SEAT so that signals A and B are ANDed
align the bits of signal A together. A copy of signal A is held in the accumulator in bit 0, but it is in the
with the correct bits in wrong bit position to be ANDed with signal B in SEAT in the bit 1 position.
signal B so the logical Therefore, signal A must be shifted into the bit 1 position. To do this the shift
AND can be accom- left logically instruction is used (Figure 4.14a). With signal A in bit 1 of the
plished. accumulator and signal B in bit 1 of SEAT, the AND operation can be
performed on the two bits. If both A and B are high, the AND operation will
leave bit 1 of the accumulator high (1). If either is low, bit 1 of the accumulator
will be low (0).
Use of Subroutines

The previous example program has been written as a subroutine named
CHECK so that it can be used at many different places in a larger program. For
instance, if the computer is controlling the speed of the automobile, it might be
desirable to be able to detect whether a driver is properly fastened in the seat
before it sets the speed at 55 miles per hour.
Since the driver’s seat information is very important, the main program
must wait until the driver is ready before allowing anything else to happen. A
program such as that shown in Figure 4.15b can be used to do this. The main
program calls the subroutine WAIT, which in turn immediately calls the
subroutine CHECK. CHECK returns to WAIT with the condition codes set as
they were after the last AND instruction. The Z bit (see Figure 4.5a) is set if A
and B are not both high (the accumulator is zero). The BEQ instruction (see
Table 4.1) in line 2 of WAIT branches back because the accumulator is zero and
causes the computer to reexecute the JSR instruction in line 1 of WAIT. This
effectively holds the computer in a loop rechecking signals A and B until the
accumulator has a nonzero value (A and B are high).

Timing Error
The time required for the A flaw in the subroutine CHECK could cause it to incorrectly perform
microcomputer to sam- the AND function. Notice that the logic states of A and B are sampled at
ple sensor inputs and different times. Signal A is first read in and masked off, then signal A and B are
perform its instructions ANDed together. There is a possibility that during the interval between the
must be taken into time A is read and the time A and B are ANDed, the state of A could change. A
account during program computer is fast, but it still takes a certain amount of time for the
design; otherwise, tim- microprocessor to execute the program instructions. For the driver’s seat
ing errors may result. application, the signals have a long time between change so the time lag is not
critical. However, in systems in which the timing of signals is very tight, the
program would have to be rewritten to remove the lag. Even after correcting

124 UNDERSTANDING AUTOMOTIVE ELECTRONICS