Page 318 - ARM 64 Bit Assembly Language

Floating point 307

• Fd and Fn can be any single or double precision FP/NEON register.
• The #fbits operand specifies the number of fraction bits in the fixed point number, and
must be less than or equal to the size of the integer register specified.

9.6.3.2 Operations

Name Effect Description
fcvtzs Rd ← f loatT oFix(Fn,fbits) Convert floating point to signed fixed
point.
fcvtzu Rd ← uf loatT oFix(Fn,fbits) Convert floating point to unsigned
fixed point.
scvtf Fd ← fixT oFloat(Fn,fbits) Convert signed fixed point to float.
scvtf Fd ← uf ixT oFloat(Fn,fbits) Convert unsigned fixed point to float.

9.6.3.3 Examples

1 fcvtzu s0,w4,#4 // Convert from U(12,4) to single
2 scvtf w3,s1,#8 // Convert from single to S(23,8)

9.7 Data processing instructions

Instructions are provided to perform the four basic arithmetic functions, plus absolute value,
negation, and square root. There are also special forms of the multiply instructions that per-
form multiply-accumulate.

9.7.1 Round to integral

These operations will round a floating point number to an integer. There are several options to
control exactly how the rounding is performed:

frinta Round away from zero
frinti Round using the mode set in the FPCR.
frintm Round towards −∞
frintn Round with halfway cases rounding to even
frintp Round towards +∞
frintx Round using mode set in the FPCR and raise an exception if the result does not have
the same value as the input.
frintz Round towards zero