Page 346 - ARM 64 Bit Assembly Language

336 Chapter 10

movi Vector Move Immediate,
mvni Vector Move NOT Immediate, and
fmov Vector Floating Point Move Immediate.

10.3.3.1 Syntax

movi Vn.T, #uimm8{, sop #shift}
mvni Vn.T, #uimm8{, sop #shift}
movi Vn.2D, #uimm64
movi Dn, #uimm64
fmov Vn.Td, #fpimm

• sop may be lsl or msl,where msl is a left shift which fills the low order bits with ones
instead of zeros.
• If sop is not present, then the shift is assumed to be an lsl with shift amount of zero.
The valid combinations of T and shift are given by the following table:

sop T shift Description

lsl 4h or 8h 0 or 8 Replicate LSL(uimm8,shift) into each
16-bit element.
lsl 2s or 4s 0, 8, 16, or 24 Replicate LSL(uimm8,shift) into each
32-bit element.
msl 2s or 4s 8 or 16 Replicate MSL(uimm8,shift) into each
32-bit element.

• For movi,if sop is not present, then T may be 8b or 16b, in addition to the values shown
in the previous table.
• uimm64 may be either 0 or 0xFFFFFFFFFFFFFFFF.
• Td may be 2s, 4s,or 2d.
• fpimm may be specified either in decimal notation or in hexadecimal using its IEEE754
r
encoding. The value must be the expressable as ±n ÷ 16 × 2 ,where n and r are integers
such that 16 ≤ n ≤ 31 and −3 ≤ r ≤ 4. It is encoded as a normalized binary floating point
number with sign, 4 bits of fraction, and a 3-bit exponent.