Page 351 - ARM 64 Bit Assembly Language
P. 351
Advanced SIMD instructions 341
Name Effect Description
ext n ← # of elements Copy bytes from Vn followed by Vm,
for 0 ≤ i< n do starting at Vn[index], until Vd is full.
if i< n − index then
Vd[i]← Vn[i + index]
else
Vd[i]← Vm[i − (n − index)]
end if
end for
10.3.5.3 Examples
1 zip1 v0.16b,v3.16b,v4.16b // interleave even elements
2 zip2 v1.16b,v3.16b,v4.16b // interleave odd elements
10.3.6 Table lookup
The table lookup instructions use indices held in one vector to lookup values from a table held
in one or more other vectors. The resulting values are stored in the destination vector. The
table lookup instructions are:
tbl Table Lookup, and
tbx Table Lookup with Extend.
10.3.6.1 Syntax
<op> Vd.T, <list>, Vm.T
• <op> is one of tbl or tbx.
• T may be 8b or 16b.
• <list> specifies the list of registers. There are five list formats:
1. {Vn.16b},
2. {Vn.16b, V(n+1).16b},
3. {Vn.16b, V(n+1).16b, V(n+2).16b},or
4. {Vn.16b, V(n+1).16b, V(n+2).16b, V(n+3).16b}.
• Adash“-” can be used to specify a range of registers, as shown in the examples below.
• Vm is the register holding the indices.
• The table can contain up to 64 bytes.

