Page 375 - ARM 64 Bit Assembly Language
P. 375
Advanced SIMD instructions 365
Name Effect Description
{f}mla Vd[] ← Vd[] + (Vn[] × Vm[x]) Multiply all elements from a vector by
one element of another vector and add
the results to a third vector.
{f}mls Vd[] ← Vd[] − (Vn[] × Vm[x]) Multiply all elements from a vector by
one element of another vector and
subtract the results from a third vector.
(s|u)mull Vd[] ← Vn[] × Vm[x] Multiply all elements from a vector by
one element of another vector and store
the results in a third vector.
(s|u)mlal Vd[] ← Vd[] + (Vn[] × Vm[x]) Multiply all elements from a vector by
one element of another vector and add
the results to a third vector.
(s|u)mlsl Vd[] ← Vd[] − (Vn[] × Vm[x]) Multiply all elements from a vector by
one element of another vector and
subtract the results from a third vector.
10.7.2.3 Examples
1 mul v1.4h,v6.4h,v7.h[1] // Multiply elements
2 umlal v0.4s,v4.4h,v5.h[0] // Multiply-accumulate long
3 fmul v1.4s,v6.4s,v7.s[1] // Multiply elements
10.7.3 Saturating vector multiply and double
These instructions perform multiplication, double the results, and perform saturation:
sqdmull Saturating Multiply Double,
sqdmlal Saturating Multiply Double Accumulate, and
sqdmlsl Saturating Multiply Double Subtract.
10.7.3.1 Syntax
sqd<op>l{2} Vd.Td, Vn.Ts, Vm.Ts
sqd<op>l{2} Vd.Td, Vn.Ta, Vm.Tb[x]
• <op> is either mul, mla,or mls.
• If 2 is present, then Td/Ts is 4s/8h or 2d/4s and the upper half of Vn and Vm are used.
Otherwise, Td/Ts is 4s/4h or 2d/2s and the lower half of Vn and Vm are used.
