Page 128 - Embedded Microprocessor Systems Real World Design

Reloading Timer

Figure 3.5B shows a more complex reloading timer. This timer has an &bit latch
to hold the value written by the microprocessor. When the microprocessor writes
to the latch, it also loads the counter. An OR gate also loads the timer when it rolls
over from FF to 00. For this example, we will assume that the logic in the IC gets
all the polarities and timings of the load signal correct so that there are no glitches
or race conditions.
The way this timer works is that the microprocessor writes a value to the latch
(also loading it into the timer) and then starts the timer. When the timer rolls over
from FF to 00, it generates an output (again, either a latched bit for the micro-
processor to read or an interrupt). At the same time that the output is generated,
the timer is loaded from the latch contents. Since the latch still holds the value
written by the microprocessor, the counter will start counting again from the same
point it did before. Now the timer will produce a regular output with the same accu-
racy as the input clock. This output could be used to generate a regular interrupt,
to provide a baud rate clock to a UART, or to provide a signal to any device that
needs a regular pulse.
A variation of this feature used in some microcontrollers does not load the
counter with the desired count value but instead loads it into a digital comparator.
The comparator compares the counter value to the value written by the micro-
processor. The counter starts at zero and counts up. When the count equals the
value written by the microprocessor, the counter is reset to zero and the process
repeats. The effect is the same as the timer just described.

Input Capture Timer

Figure 3.5C shows an input capture timer. In this case, the timer counts from zero
to FF. When a pulse occurs on the capture input pin, the contents of the counter
are transferred to an &bit latch and the counter is reset. The input pulse also
generates an interrupt to the microprocessor. The diagram shows the timer clear
connected directly to the input pin; in an actual circuit, of course, there will
be some gating and synchronizing logic to make sure all the timing is right. Simi-
larly, the capture pin will not connect directly to a microprocessor interrupt but
will be passed through some flip-flops, timing logic, interrupt controller logic, and
so on.
This configuration is typically used to measure the time between the leading
edge of two pulses. The timer is run at a constant clock, usually a derivative of
the microprocessor clock. Each time an edge occurs on the input capture pin, the
processor is interrupted and the software reads the capture latch. The value in the
latch is the number of clocks that occurred since the last pulse.
Some microcontrollers do not reset the counter on an input capture but let
the counter free run. In those configurations, the software must remember the

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