Page 186 - Hardware Implementation of Finite-Field Arithmetic

Poly_multiplier
b 0 a 0 b 0 a 0 b 1 a 1 b 0 b 2 a 0 a 1 b 1 a 2 b 0 a 0 b m–1 a m–1 b 1 a m–1 . . . . . . d 0 d 1 d 2 d k R 0,m–2 R 0,1 R 0,0 R 1,m–2 R 1,1 R 1,0 ·d 2·m–2 ·d m–1 ·d m ·d 2·m–2 ·d m–1 ·d m d 1 d 0 . . . . . . . . . c 0 c 1 Poly_reducer
. . .
a 1 R 2,m–2 ·d 2·m–2
b m–1 . . .
. . . c 2
a m–1 d k + 1 R 2,1 ·d m–1
b 2 R 2,0 ·d m Datapaths for Poly_multiplier and Poly_reducer in classic multiplication.
a m–1
b 1 d 2
. . .
a m–2
b m–1
d 2·m–3 R m–1,m–2 ·d 2·m–2

a m–1 . . .
b m–2 R m–1,1 ·d m–1 c m–1

a m–1 R m–1,0 ·d m
b m–1 d 2·m–2 d m–1 FIGURE 7.1

168