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9.4. Parallel Signed-Digit Arithmetic
                                     Table 9.22
            Reduced Truth Table for the One-Step Digit-Set-Restricted MSB Addition with
                           Digit-Set-Restricted Reference Digits

       Output literal                 Minterms x iy ix i_ ly i. lx i_ 2yi-2

                        OOTIdd, dj,d T,TIdd, OOTOd Tod ro, OOOTd T()d IO, di.diJOdjodfo, d T ,d ri OTdj ( »d 1(h
                         d T ,OlTdd, dnOTldd, Od Tl lTdd, Od r ,Tldd, d Tl010d Tod To, d T,001d I0d K1,
                         Od T,10d Tod To, OdnOldrodjo
                        OOlOld, OOlOdl, 0001 Id, OOOldl, dj,d Tl 10Id, dndnlOdl, d Tl d T ,011d,
                         d Tldi,01dl, 001 Idd, d T ,di,Hdd, d T,Ol01d, d T,OOlld, d T,OTOdl, d hOO!di,
                         Od riT01d, Od r,OTld, Od n IOdl, Od nOTdl, d,,000dd, Od TlOOdd




       Equation (9.47) implies that the summation of two N-digit MSD numbers X
       and Y is equal to the summation of (N + I) -bit intermediate carry word C
       and sum word S, which is unlike the algorithm with the nonrestricted reference
       digits mentioned above. As an example, let us consider the three-step addition
       of the following two 8-digit MSD numbers.


                               (X) 0101IIT01 =(133)i 0
                               (Y) 01TT01T11 =(39) 10
                        step 1: (R) 101010110
                        step 2: (C)
                               (S) 100000100
                        step 3: (Z) lOMIlOO - (172) 10.

       Table 9.18 shows that the digit pairs (T, I), (T, 0), (0, 1), and (0, 0) determine the
       reference digits valued 0 while the pairs (1,1), (1,1), (1,0), (0,1), and (1, I)
       determine the reference digits valued 1. From Table 9.19, we notice that some
       digit pairs; e.g., pairs (0,0) and (1,1), generate the identical outputs. It is
       possible and important to design an appropriate encoding scheme so that the
       algorithm can be simplified and implemented by binary logic functions. Three
       binary bits («,., v t, w,-) can be used to code the input digit pairs (x t, y t), as shown
       in Table 9.23. The digit combinations generating the same intermediate carry
       and sum in terms of determined reference digit have the same u t and u,.. For
       instance, the (w r-, v,.) of the combinations (T, !),(!, T), and (T, 1) are all (1, 0). The
       third encoding digit w ; of one digit pair is equal to the reference digit generated
       by this pair as described below:

                                    r l+ 1 = w,..                    (9.48)
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