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6.4 Calling And Returning Mechanisms                                 17 i


            A trap handler, shown in Figure 6.45, can execute the program segment to compute
        the inner product, if the instruction whose opcode is $1830 is executed; can execute the
        program segment to compute the quadratic formula, if the instruction whose opcode is
         $1831 is executed; can execute the program segment to compute the temperature
        conversion, if the instruction whose opcode is $1832 is executed; and can execute the
        program segment to compute the parallel resistor calculation, if the instruction whose
        opcode is $1833 is executed. Each of the program segments in the trap handler will look
         like the SWI handler shown in Figure 6.43. Calling routines can generate these
         nonstandard opcodes using DC directives, as in Figure 6.46. This program passes
         arguments in the registers for the quadradic formula and then for the parallel resistor
        formula.
            The TRAP instructions can be used to emulate other instructions. Emulation means
        getting exactly the same result but perhaps taking more time. This technique is often
        used in minicomputers that are sold in different models that have different costs and
         speeds. The faster, more expensive model may have an instruction such as floating point
        add that is implemented on the slower, cheaper model as TRAP. The same program can
        be run in both the cheaper and more expensive models. When such an opcode is
        encountered in more expensive models, it results in the execution of the instruction. In
        cheaper models it results in calling a handler to emulate the instruction. In a sense, the
         instruction TRAP is a wildcard instruction because it behaves a bit like an instruction but
        is really a call to a software handlers. The 68000 family uses these types of instructions,
        which they call f-line instructions, to emulate some instructions in the cheaper 68332
        that are implemented in hardware in the 68020 and 68881.
            We digress for a moment to discuss hardware interrupts. These are handlers that are
        called up by an I/O device when that device wants service. An I/O hardware interrupt can
        occur at any time, and the main program will stop as if the next instruction were an SWI
         instruction. When the handler has finished, the RTI instruction is executed. This causes
        the main program to resume exactly where it left off. One exception, the reset interrupt,
        occurs when the reset pin on 6812 has a low signal put on it. The program counter is
        then loaded with the contents of locations $FFFE and $FFFF. The reset pin can be put
        in a circuit such that the pin is put low whenever the power is turned on, thus allowing
        the microprocessor to start running its program stored in ROM. The hardware interrupt is
        not all that magical. It is merely a handler that is called by I/O hardware by putting the
        appropriate signal on some pin of the 6812. This hardware is outside the direct control of
        the program that you are writing. Interrupts are further considered in Chapter 11.
            In this section we have considered the subroutine and its alternatives. The subroutine
        is most often called by the BSR or JSR instruction, but it is occasionally called using
        the JSR instruction with direct or index addressing to achieve position independence.
        The SWI and RTI instructions call and return from handlers, which are like subroutines
        but are also like user-defined machine instructions. The hardware interrupt is a handler
        that is initiated by a hardware signal rather than a program call. With these tools, you are
        ready to modularize your programs into subroutines or equivalent program segments, so
        that each subroutine is more compact and easier to understand and so that interactions
        between these subroutines are carefully controlled to prevent unnecessary propagation of
        errors.
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