Page 259 - Making PIC Microcontroller Instruments and Controllers

SPECIAL IIOTES FOB TIIf,ERI USAGE 257

keep in mind that reading the 16 bit timer in two 8-bit values itself poses certain
problems, since the timer or one oJ the registers that fom the tiner mal owrfot\)

For wdtes, it is recommended that the user simply stop the timer and write the desired
values. A write contention can occur by writing to ihe timer registe$, while lhe register
is incrementing. This can produce an unpredictable value in the timer register Reading
the 16-bit value requires some care. Examples 12-2 and l2-3 in Ihe Plcnicro Mi.l-
Range MCU Family Reference Manwl (DS3A23) show how to read and write Timerl
when it is running in asynchronous mode.

THE IIMERI OSCILLATOR
Acrystal oscillator circuit is built in beiween pins TlOSI (inpui) and TlOSO (ampli-
fier output). It is enabled by setting conrrol bit TIOSCEN (TlCON<3>). The oscil-
lator is a low-power oscillator rated up to 200 kHz. Il will continue to run during sleeps.
It is primarily intended for use wilh a 32 kHz cryslal. The data sheetshows the capac
itor selection for the Timerl oscillator.
The Timerl oscillator is identical to the LP osciliator The user must provide a soltware
time delay to ensure proper oscillator startup.

RESETII G TIIIIERI USII{G A CCP TNIGGEB OUTPUI
"special
If the CCPI or CCP2 module is configured in compare mode to generate a
event trigger" (CCPlM3:CCPlM0 = 1011), this signal will resetTimerl. Timerl must
be configured for either timer or synchronized counter mode to take advantage of lhis
feature. If Trmerl is running in asynchronous counler mode, this reset opemtion may
not work. In the event that a write to Timerl coincides wilh a special event trigger from
CCP1 or CCP2, the write will take precedence. In this mode of operalion, the
CCPRIH:CCPRXL rcgister parr eflectively becomes the period register fbrTimerl.

RESETTII{G OF TIMERI REGISTEB PAIN (tMRI H, IMRILI

TMR1H and TMR1Lregisters are notreset to 00h on a POR or any other reset except
by the CCP I and CCP2 .Fcial e!enr rfiggerr.
T l CON register is resel to 00h on a power-on reset or a brown-out rcset, which shuts
off the timer and leaves a 1 i I prescale. In all other resets. the register is unaffected.
It is recommended practice that you stop TMR1 before reading or wr;ting the two
registers. This avoids the probiem of the low-byte register overflowing and changing
the high byte register while you are in the middle of setting the two registers. There is
no way to set them both sim ltaneously. (This is possible in some other PICS.)

THE TIMERI PRESCALAR

The prescalar counter is cleared on $rites 1o the TMRIH or TMR1L registers so it bas
to be reselected after a wdte to ths timer registers.