Page 682 - Mechanical Engineers' Handbook (Volume 2)

8 Controller Implementation 673

Hard-wired digital electronics are commonly used with high-resolution incremental en-
coders, as illustrated in Fig. 45a. Two pulse trains are generated by the encoder 90 out of
phase with one another. Pulse-conditioning circuitry squares up the incoming pulses, deter-
mines the transducer’s direction of motion, and often increases the resolution by a factor of
4. The asynchronous counter is incremented up or down by each feedback pulse, depending
upon the direction of motion. Similarly, command pulses also increment the counter up or
down. The net count at any particular time represents the difference between the number of
command and feedback pulses since the counter was initialized. After digital-to-analog con-
version, this count becomes the error signal transmitted to the analog electronics.
The command pulse train can be generated by additional digital hardware or by a com-
puter. However, if the transducer resolution is high and the desired maximum command rate
is high, a computer may be hard pressed to provide the required pulse rates. In this case,
hardware comparators and rate multipliers may prove more satisfactory. It should be noted
that an incremental system has no inherent knowledge of its absolute position. Therefore,
power shutdowns and electrical noise can cause such a system to lose track of where it is.
For this reason a ‘‘marker pulse’’ is often provided at some known position to reinitialize
the counter periodically. Alternatively, the servo occasionally can be commanded to a me-
chanical ‘‘home’’ position. As with most transducers having finite resolution, encoders will
usually cause limit cycling with an amplitude equal to the least significant bit (Section 7.1).
Absolute digital systems can also be implemented in electronic hardware, as shown in
Fig. 45b. The encoding transducer outputs a digital word that represents its absolute position
at all times. For an optical encoder, the resolution is typically between 12 and 24 bits. After
buffering, the feedback word is digitally subtracted from a digital command, and the resulting
error is converted to an analog signal that is transmitted to the analog electronics. The digital
summing junction can be implemented in a number of ways, including the use of an arith-
metic logic unit (ALU), which operates at very high speeds. The digital command and
feedback information can be transmitted to the summing junction as parallel digital words
or as serial data that must be multiplexed and then decoded. The command information can
be generated from a computer or digital thumbwheels.
The absolute system is less susceptible to loss of position information than the incre-
mental system, but the transducers are considerably more expensive and less reliable, and a
wire is required for each bit. To improve reliability and reduce cost, resolvers or other sine/
cosine output devices are often used, together with a resolver-to-digital (R/D) converter. The
penalty is reduced overall accuracy, although this can be improved by using coarse/fine
resolvers and appropriate additional hardware logic.

8.3 Computer-Based Digital Controllers
The hard-wired digital controllers of Fig. 45 have limited flexibility and functional capability.
The use of a microprocessor may reduce electronic hardware complexity when elaborate
system functions are required. There are many such functions that are well suited to micro-
processor implementation:
• Command processing (nonlinear functions, limiting, switching, and communication
with other computers)
• Redundancy management (fault detection, isolation, and reconfiguration)
• Adaptive control (self-adjustment of control loop parameters as operating conditions
or environmental factors change)
• Built-in test (BIT) features